View L4995_5008730.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

L4995
5V, 500mA low drop voltage regulator
Features
Max DC supply voltage Max output voltage tolerance Max dropout voltage Output current Quiescent current
1. Typical value with regulator disabled
VS V0 Vdp I0 Iqn
40V +/-2% 500mV 500mA 3A(1)
PowerSSO-12
PowerSSO-24
Operating DC supply voltage range 5.6V to 31V Low dropout voltage Low quiescent current consumption Reset circuit sensing of output voltage down to 1V Programmable reset pulse delay with external capacitor Programmable watchdog(a) timer with external capacitor Thermal shutdown and short circuit protection Wide temperature range (Tj = -40C to 150C) Enable(a) input for enabling / disabling the voltage regulator
The output voltage regulating element consists of a p-channel MOS and regulation is performed regardless of input voltage transients of up to 40V. The high precision of the output voltage is obtained using a pre-trimmed reference voltage. The L4995 family is protected against short circuit and over-temperature protection switches off the devices in the case of extremely high power dissipation.

The L4995 integrates the Watchdog, Enable and externally programmable Reset circuits. The L4995A features the externally programmable Reset and Enable. Finally the L4995R features the externally programmable Reset.
Description
L4995 is a family of monolithic integrated 5V voltage regulators with a low drop voltage at currents of up to 500mA, available in both 12 and 24 pin packages.
The combination of such features makes this device particularly flexible and suitable to supply microprocessor systems in automotive applications.
Table 1.
Device summary
Package Order codes Tube L4995J - L4995AJ - L4995RJ L4995K - L4995AK - L4995RK Watchdog X Reset X X X Tape & reel L4995JTR - L4995AJTR - L4995RJTR L4995KTR - L4995AKTR - L4995RKTR Enable X X -
PowerSSO-12 (exposed pad) PowerSSO-24 (exposed pad) P/N L4995J - L4995K L4995AJ - L4995AK L4995RJ - L4995RK
a. Watchdog and Enable facilities are available according to Table 1: Device summary
December 2007
Rev 6
1/33
www.st.com 33
Contents
L4995
Contents
1 2 Block diagrams and pins descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 2.2 2.3 2.4 2.5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Test circuit and waveforms plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.5.1 Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 3.2 3.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1 4.2 PowerSSO-12TM thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 PowerSSO-24TM thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.1 5.2 5.3 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 PowerSSO-12TM packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PowerSSO-24TM packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2/33
L4995
List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pins descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 PowerSSO-12TM thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 PowerSSO-24TM thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 PowerSSO-12TM mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 PowerSSO-24TM mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3/33
List of figures
L4995
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Block diagram of L4995 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Block diagram of L4995A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Block diagram of L4995R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pins configurations (L4995) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Output voltage vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output voltage vs. Vs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Drop Voltage vs. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Current consumption vs. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Current consumption vs. Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Current limitation vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Current limitation vs. Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Short Circuit Current vs. Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Output Voltage vs. Enable Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 VEn_high vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 VEN_LOW vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Vrhth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Vrlth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Vwhth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Vwlth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Icr & Icwc vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Idr & Icwd vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Twop vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 PSRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Load regulation test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Maximum load variation response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 L4995 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Behavior of output current versus regulated voltage Vo . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Reset timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Watchdog timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 PowerSSO-12TM PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 19 PowerSSO-12TM thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 20 Thermal fitting model of Vreg in PowerSSO-12TM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 PowerSSO-24TM PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 22 PowerSSO-24TM thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 23 Thermal fitting model of Vreg in in PowerSSO-24TM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 PowerSSO-12TM package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 PowerSSO-24TM package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 PowerSSO-12TM tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PowerSSO-12TM tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PowerSS0-24TM tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PowerSSO-24TM tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4/33
L4995
Block diagrams and pins descriptions
1
Block diagrams and pins descriptions
Figure 1. Block diagram of L4995
Is Vs Vo Io
Vos V S I En En VEn Icw Vcw Voltage Reference 100mV + _ Vo Start up 1.25V
Vcw
Wi watchdog
Res
Vwi Vcr Low Voltage Reset GND
V
Res
Vcr
Figure 2.
Block diagram of L4995A
Vs Vo
Is
Io
Vos V S I En En VEn Voltage Reference 100mV + _ Vo Start up 1.25V
Res
Vcr Vcr
Low Voltage Reset GND
V
Res
5/33
Block diagrams and pins descriptions Figure 3. Block diagram of L4995R
Vo
L4995
Is
Vs
Io
Vos V S Start up 1.25V Voltage Reference VEn
100mV + _
Vo
Res
Vcr Vcr
Low Voltage Reset GND
V
Res
Table 2.
Pin name
Pins descriptions
PowerSSO-12 PowerSSO-24 pin # pin # Function Enable input (L4995 and L4996A only, otherwise not connected). If high regulator, watchdog and reset are operating. If low regulator, watchdog and reset are shut down. Connect to Vs if not used. Not connected. Ground reference. Ground (these pins are to be connected to a heat spreader electrically grounded). Reset output. It is pulled down when output voltage goes below Vo_th or frequency at Wi is too low. Leave floating if not used. Reset timing adjust. A capacitor between Vcr pin and gnd. sets the reset delay time (trd). Leave floating if Reset is not used. Watchdog timer adjust (L4995 only, otherwise not connected). A capacitor between Vcw pin and gnd. sets the time response of the watchdog monitor.
En
1
13, 14, 15
NC Gnd Gnd
2, 4, 8 3 -
3, 5, 6, 9, 11 16, 17, 18 1, 12
Res
5
19, 20, 21
Vcr
6
22, 23, 24
Vcw
7
2
6/33
L4995 Table 2.
Pin name
Block diagrams and pins descriptions Pins descriptions (continued)
PowerSSO-12 PowerSSO-24 pin # pin # Function Watchdog input (L4995 only, otherwise not connected). If the frequency at this input pin is too low, the Reset output is activated. Regulator voltage output sensing. 5 voltage regulator output. Block to ground with a capacitor >100nF (needed for regulator stability). Supply voltage. Block to ground directly at Vs pin with a ceramic capacitor (e.g. 200nF).
Wi Vos Vo
9 10 11
4 7 8
Vs
12
10
Figure 4.
Pins configurations (L4995)
TAB = GND
TAB = GND
7/33
Electrical specifications
L4995
2
2.1
Electrical specifications
Absolute maximum ratings
Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 3.
Symbol VVsdc IVsdc VVo IVo VWi Vod Iod Vcr Vcw VEn Tj VESD VESD DC supply voltage Input current DC output voltage DC output current Watchdog input voltage Res output voltage Res output current Vcr voltage Watchdog delay voltage Enable input Junction temperature ESD voltage level (HBM-MIL STD 883C) ESD voltage level (CDM AEC-Q100-011)
Absolute maximum ratings
Parameter Value - 0.3 to 40 Internally limited - 0.3 to 6 Internally limited -0.3 to VVo + 0.3 -0.3 to VVo + 0.3 Internally limited - 0.3 to VVo + 0.3 - 0.3 to VVo + 0.3 - 0.3 to VVsdc +0.3 - 40 to 150 2 750 V V V C kV V V V V Unit V
8/33
L4995
Electrical specifications
2.2
Thermal data
For details, please refer to Section 4.1: PowerSSO-12TM thermal data and Section 4.2: PowerSSO-24TM thermal data. Table 4.
Symbol
mm
Thermal data(1)
Parameter Thermal resistance Junction to Ambient: PowerSSO-12 PowerSSO-24 Thermal resistance Junction to Ambient: PowerSSO-12 PowerSSO-24 Value Unit
Rthj-case
5 4 52 38
K/W K/W K/W K/W
Rthj-amb
1. The values quoted are for PCB 77mm x 86mm x 1.6mm, FR4, double layer; Copper thickness 0.070mm Copper area 3cm2 Thermal Vias, Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm +/- 0.08 mm, Cu thickness on vias 0.025 mm.
2.3
Electrical characteristics
Values specified in this section are for Vs = 5.6V to 31V, Tj = -40 C to +150 C unless otherwise stated. Table 5.
Pin Vo Vo Vo Vs, Vo Vo Vs, Vo Vs, Vo Vs, Vo Vs, Vo Vs, Vo
General
Symbol Vo_ref Ishort Ilim(2) Vline Vload Vdp(3) SVR Iqs Iqn_1 Iqn_50 Parameter Output voltage Short circuit current Output current limitation Line regulation voltage Load regulation voltage Drop voltage Ripple rejection Current consumption with regulator disabled Current consumption with regulator enabled Current consumption with regulator enabled Test condition Vs = 5.6 to 31V Io = 0 to 500mA Vs = 13.5V (1) Vs = 13.5V (1) Vs = 5.6 to 31V Io = 0 to 500mA Io = 0 to 500mA Io = 400mA fr = 100 Hz (4) Vs = 13.5V, En = low Vs = 13.5V, Io < 1mA, Vs = 13.5V, Io = 50mA, 55 3 90 290 10 160 400 270 Min. 4.9 550 600 Typ. Max. 5.00 800 900 5.1 1050 1250 25 25 500 Unit V mA mA mV mV mV dB A A A
9/33
Electrical specifications Table 5.
Pin Vs, Vo Vs, Vo Vs, Vo
L4995
General (continued)
Symbol Iqn_150 Iqn_250 Iqn_500 Tw Tw_hy Parameter Current consumption with regulator enabled Current consumption with regulator enabled Current consumption with regulator enabled Thermal protection temperature Thermal protection temperature hysteresis Test condition Vs = 13.5V, Io = 150mA, Vs= 13.5V, Io= 250mA, Vs= 13.5V, Io= 500mA, 150 10 Min. Typ. Max. 740 1 2.1 1000 1.4 2.7 190 Unit A mA mA C C
1. See Figure 27. 2. Measured output current when the output voltage has dropped 100mV from its nominal value obtained at Vs=13.5V and Io= 250mA. 3. Vs-Vo measured when the output voltage has dropped 100mV from its nominal value obtained at Vs=13.5V and Io= 250mA. 4. Guaranteed by design.
Table 6.
Pin Res Res Res Res Vcr Vcr Vcr Vcr Res Res
Reset
Symbol Vres_l IRes_lkg RRes Vo_th Vrlth Vrhth Icr Idr Trr Trd Parameter Reset output low voltage Test condition Rext = 5k to Vo, Vo > 1V Min. Typ. Max. 0.4 1 10 Vs = 5.6 to 31V Io = 1 to 500mA Vs = 13.5V Vs =13.5V Vs = 13.5V Vs = 13.5V Vo = Vo_th -100mV Vs = 13.5V, Ctr = 47nF 6% 10% 44% 8 8 100 13 20 8% 13% 47% 15 15 250 39 40 10% 16% 50% 30 30 700 70 Unit V A k below Vo_ref Vo_ref Vo_ref A A s ms
Reset output high leakage VRes = 5V current Pull up internal resistance (versus Vo) Vo out of regulation threshold Reset delay circuit low threshold Reset delay circuit high threshold Charge current Discharge current Reset reaction time(1) Reset delay time
1. When Vo becomes lower than 4V, the reset reaction time decreases down to 2s assuring a faster reset condition in this particular case.
10/33
L4995 Table 7.
Pin Wi Wi Wi Wi Vcw Vcw Vcw Vcw Vcw Res
Electrical specifications Watchdog
Symbol Vih Vil Vih Iwi Vwlth Vwhth Icwc Icwd Twop twol Parameter Input high voltage Input low voltage Input hysteresis Pull down current Low threshold High threshold Charge current Discharge current Watchdog period Watchdog output low time Test condition Vs = 13.5V Vs = 13.5V Vs = 13.5V Vs = 13.5V Vwi = 3.5V Vs = 13.5V Vs = 13.5V Vs = 13.5V, Vcw = 0.1V Vs = 13.5V, Vcw = 2.5V Vs = 13.5V, Ctw = 47nF Vs = 13.5V, Ctw = 47nF 10% 44% 5 1.25 20 4 500 6 13% 47% 10 2.5 40 8 10 16% 50% 20 5 80 16 Min. 3.5 1.5 Typ. Max. Unit V V mV A Vo_ref Vo_ref A A ms ms
Table 8.
Pin En En En En
Enable
Symbol VEn_low VEn_high VEn_hyst IEn Parameter En input low voltage En input high voltage En input hysteresis Pull down current Vs = 13.5V 3 830 10 18 Test condition Min. Typ. Max. 1 Unit V V mV A
11/33
Electrical specifications
L4995
2.4
Figure 5.
Vo_ref (V)
5,5 5,4 5,3 5,2 5,1 5 4,9 4,8 4,7 4,6 4,5 -50
Electrical characteristics curves
Output voltage vs. Tj Figure 6.
Vo_ref (V)
10
Output voltage vs. Vs
Vs= 13.5V I0 = 250mA
9 8 7 6 5 4 3 2 1 0
I0 = 250 mA Tj = 25 C
-25
0
25
50
75
100
125
150
0
5
10
15
20
25
30
35
Tj(C )
Vs (V )
Figure 7.
Drop Voltage vs. Output Current
Figure 8.
Current consumption vs. Output Current
Vdp (V)
0,5 0,45 0,4 0,35 0,3 0,25 0,2 0,15 0,1 0,05 0 -100 0 100 200 300 400 500 600
Iqn (A)
2500
2000
Vs= 13.5 V Tj= 25 C En= High
Tj= 125 C
1500
Tj= 25 C
1000
500
0 -100 0 100 200 300 400 500 600
Io (mA)
Io (mA)
Figure 9.
Current consumption vs. Input Voltage
Figure 10. Current limitation vs. Tj
Iqn(A )
1200 1100 1000 900
Ilim (mA)
1200
Io= 250mA
Tj = 25 C En = High
1100
1000
800 700 600 500 400 300 200
Io= 150mA
900
Vs= 13.5V
800
Io =50mA
700
Io < 1mA
100 0 0 5 10 15 20 25 30 35
600
500 -50 -25 0 25 50 75 100 125 150
Vs (V )
Tj(C )
12/33
L4995
Electrical specifications
Figure 11. Current limitation vs. Input Voltage
Figure 12. Short Circuit Current vs. Input Voltage
Ishort (mA )
1000 950 900
Tj = 25 C
Ilim (mA)
1200 1150 1100 1050 1000 950 900 850 800 750 700 650 600 550 500 0 5 10 15 20 25 30 35
Tj = 25 C
850 800 750
Tj = 125 C
Tj = 150 C
700 650 600 550 500 0 5 10 15 20 25 30 35
Vs (V )
Vs (V )
Figure 13. Output Voltage vs. Enable Voltage
6,0
Figure 14. VEn_high vs. Tj
Ven_high (V)
3 2,9
5,0
2,8 2,7 2,6 2,5 2,4 2,3 2,2 2,1
Vs= 5.6V to 31V
4,0
Vo (V)
3,0
2,0
1,0
0,0 0,0
2
0,8
1,4
1,7
2,0
2,3
2,6
2,9
5,0
-50
-25
0
25
50
75
100
125
150
V (V en )
Tj(C )
Figure 15. VEN_LOW vs. Tj
Ven_low (V)
2
Figure 16. Vrhth vs. Tj
Vrhth (% Vo_ref )
80
1,9
70
Vs= 5.6V to 31V
1,8
Vs= 5.6V to 31V
60
1,7
50
1,6
40
1,5
30
1,4 -50 -25 0 25 50 75 100 125 150
20 -50 -25 0 25 50 75 100 125 150
Tj(C )
Tj(C )
13/33
Electrical specifications
L4995
Figure 17. Vrlth vs. Tj
Vrlth (% Vo_ref)
50
Figure 18. Vwhth vs. Tj
Vwhth (% Vo_ref )
80
40
Vs= 5.6V to 31V
70
Vs= 5.6V to 31V
60 30 50 20 40 10
30
0 -50 -25 0 25 50 75 100 125 150
20 -50 -25 0 25 50 75 100 125 150
Tj(C )
Tj(C )
Figure 19. Vwlth vs. Tj
Vwlth (% Vo_ref)
50
Figure 20. Icr & Icwc vs. Tj
Icr & Icwc (A)
20 18
40
Vs= 5.6V to 31V
16
Vs= 5.6V to 31V Vcw= 0.1V Icr
30
14 12
20 10 10 8 6 0 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25
Icwc
50
75
100
125
150
Tj(C )
Tj(C )
Figure 21. Idr & Icwd vs. Tj
Idr & Icwd (A)
20 18 16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 150
Figure 22. Twop vs. Tj
Twop (ms)
80
Idr
Vs= 5.6V to 31V Vcw = 2.5V
70
60
Vs= 5.6V to 31V Ctw= 47nF
50
40
Icwd
30
20 -50 -25 0 25 50 75 100 125 150
Tj(C )
Tj(C )
14/33
L4995
Electrical specifications
Figure 23. PSRR
C0= 4.7 F
PSRR [dB] 80,00 70,00 60,00 50,00 40,00 30,00 20,00 10,00 0,10 1,00 10,00 100,00 1000,00 0,00 10000,00
FREQUENCY [KHz]
2.5
2.5.1
Test circuit and waveforms plot
Load regulation
Figure 24. Load regulation test circuit
10
Figure 25. Maximum load variation response
V0
[1V /div]
I0
[200mA /div]
0,00E+00
5,00E-05
1,00E-04
1,50E-04
2,00E-04
2,50E-04
3,00E-04
3,50E-04
4,00E-04
Time [s]
15/33
Application information
L4995
3
Application information
Figure 26. L4995 application schematic
Vi
Vs
Vo
Vo s Start up
1.25V
Co1
Co2
En
Voltage Reference
gnd
100mV + _
Vcw Ctw Res Wi watchdog
Vcr Ctr
Low Voltage Reset
Note:
The input capacitor Cs > 200nF is necessary for the smoothing of line disturbances. The output capacitor C01 > 100nF is necessary for the stability of the regulation loop. In order to dampen output voltage oscillations during high load current surges, it is recommended an additional electrolytic capacitor C02 > 10F to be placed at the output pin.
3.1
Voltage regulator
Voltage regulator uses a p-channel transistor as a regulating element. With this structure, very low dropout voltage at current up to 500mA is obtained. The output voltage is regulated up to transient input supply voltage of 40V. No functional interruption due to over-voltage pulses is generated. A short circuit protection to GND is provided. The voltage regulator is active when En is high. Figure 27. Behavior of output current versus regulated voltage Vo
Vo Vo_ref
Ishort Ilim
Iout
16/33
L4995
Application information
3.2
Reset
The reset circuit supervises the output voltage Vo. The Vo_th reset threshold is defined with the in-ternal reference voltage and a resistor output divider. If the output voltage becomes lower than Vo_th then Res goes low with a reaction time trr. The reset low signal is guaranteed for an output voltage Vo greater than 1V. When the output voltage becomes higher than Vo_th then Res goes high with a delay trd. This delay is obtained by an internal oscillator. The oscillator period is given by: Tosc = [(Vrhth-Vrlth) x Ctr] / Icr + [(Vrhth-Vrlth) x Ctr] / Idr where: Icr: Idr: Vrhth, Vrlth: Ctr: trd is given by: trd = (Vrhth x Ctr)/Icr + 3 x Tosc Reset is active when En is high. Figure 28. Reset timing diagram is an internally generated charge current is an internally generated discharge current are two voltages defined with the output voltage and a resistor output divider is an external capacitance.
Wi Vout_th Tosc trr Vrhth Vrlth trd Res
Vo Vcr
< trr
17/33
Application information
L4995
3.3
Watchdog
A connected microcontroller is monitored by the watchdog input Wi. If pulses are missing, the Reset output pin is set to low. The pulse sequence time can be set within a wide range with the external capacitor, Ctw. The watchdog circuit discharges the capacitor Ctw, with the constant current Icwd. If the lower threshold Vwlth is reached, a watchdog reset is generated. To prevent this the microcontroller must generate a positive edge during the discharge of the capacitor before the voltage has reached the threshold Vwlth. In order to calculate the minimum time t, during which the micro-controller must output the positive edge, the following equation can be used: (Vwhth-Vwlth) x Ctw = Icwd x t Every Wi positive edge switches the current source from discharging to charging. The same happens when the lower threshold is reached. When the voltage reaches the upper threshold, Vwhth, the current switches from charging to discharging. The result is a saw-tooth voltage at the watchdog timer capacitor Ctw. Figure 29. Watchdog timing diagram
Wi Twop Vwhth Vcw twol Res Vwlth
18/33
L4995
Package and PCB thermal data
4
4.1
Package and PCB thermal data
PowerSSO-12TM thermal data
Figure 30. PowerSSO-12TM PC board
.
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70m (front and back side) Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm +/- 0.08 mm, Cu thickness on vias 0.025 mm, Footprint dimension 4.1 mm x 6.5 mm ). Figure 31. Rthj-amb Vs. PCB copper area in open box free air condition
RTHj_amb(C/W)
70 65 60 55 50 45 40 0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
19/33
Package and PCB thermal data Figure 32. PowerSSO-12TM thermal impedance junction ambient single pulse
L4995
ZTH (C/W)
100
Footprint 2 cm2 8 cm2
10
1
0,1 0,0001
0,001
0,01
0,1 1 Time (s)
10
100
1000
Equation 1: pulse calculation formula Z =R +Z ( 1 - )
TH
TH
THtp
where = tP/T Figure 33. Thermal fitting model of Vreg in PowerSSO-12TM
20/33
L4995 Table 9. PowerSSO-12TM thermal parameter
Footprint
Package and PCB thermal data
Area/island (cm2)
2
8
R1 (C/W) R2 (C/W) R3 (C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
0.45 1.79 7 10 22 26 0.001 0.0022 0.05 0.2 0.27 3 0.1 0.8 6 0.1 1 9 10 15 20 9 10 15
21/33
Package and PCB thermal data
L4995
4.2
PowerSSO-24TM thermal data
Figure 34. PowerSSO-24TM PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70m (front and back side) Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm +/- 0.08 mm, Cu thickness on vias 0.025 mm, Footprint dimension 4.1 mm x 6.5 mm ). Figure 35. Rthj-amb Vs. PCB copper area in open box free air condition
RTHj_amb(C/W)
55 50 45 40 35 30 0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
22/33
L4995
Package and PCB thermal data Figure 36. PowerSSO-24TM thermal impedance junction ambient single pulse
ZTH (C/W)
100
Footprint 2 cm2 8 cm2
10
1
0,1 0,0001
0,001
0,01
0,1 1 Time (s)
10
100
1000
Equation 2: pulse calculation formula Z =R +Z ( 1 - )
TH
TH
THtp
where = tP/T Figure 37. Thermal fitting model of Vreg in in PowerSSO-24TM
23/33
Package and PCB thermal data Table 10. PowerSSO-24TM thermal parameter
Footprint 2 8
L4995
Area/island (cm2)
R1 (C/W) R2 (C/W) R3 (C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
0.45 1.79 6 7.7 9 28 0.001 0.0022 0.025 0.75 1 2.2 4 5 9 17 9 17 8 10
24/33
L4995
Package and packing information
5
5.1
Package and packing information
ECOPACK(R) packages
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 38. PowerSSO-12TM package dimensions
25/33
Package and packing information Table 11. PowerSSO-12TM mechanical data
Millimeters Symbol Min. Typ. Max.
L4995
A A1 A2 B C D E e H h L k X Y ddd
1.250 0.000 1.100 0.230 0.190 4.800 3.800 0.800 5.800 0.250 0.400 0 2.200 2.900
1.620 0.100 1.650 0.410 0.250 5.000 4.000
6.200 0.500 1.270 8 2.800 3.500 0.100
26/33
L4995 Figure 39. PowerSSO-24TM package dimensions
Package and packing information
Table 12.
PowerSSO-24TM mechanical data
Millimeters
Symbol Min. Typ. Max.
A A2 a1 b c D E e e3 G
2.15 2.15 0 0.33 0.23 10.1 7.4 0.8 8.8
2.47 2.40 0.075 0.51 0.32 10.5 7.6
0.1
27/33
Package and packing information Table 12. PowerSSO-24TM mechanical data
Millimeters Symbol Min. Typ. Max.
L4995
G1 H h k L N X Y 4.1 6.5 0.55 5 10.1
0.06 10.5 0.4
0.85 10 4.7 7.1
28/33
L4995
Package and packing information
5.2
PowerSSO-12TM packing information
Figure 40. PowerSSO-12TM tube shipment (no suffix)
B C
A
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm.
100 2000 532 1.85 6.75 0.6
Figure 41. PowerSSO-12TM tape and reel shipment (suffix "TR")
REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing All dimensions are in mm.
End
W P0 ( 0.1) P D ( 0.05) D1 (min) F ( 0.1) K (max) P1 ( 0.1)
12 4 8 1.5 1.5 5.5 4.5 2
Start Top cover tape No components 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min Components No components
29/33
Package and packing information
L4995
5.3
PowerSSO-24TM packing information
Figure 42. PowerSS0-24TM tube shipment (no suffix)
C B
Base Qty Bulk Qty Tube length (0.5) A B C (0.1) All dimensions are in mm.
49 1225 532 3.5 13.8 0.6
A
Figure 43. PowerSSO-24TM tape and reel shipment (suffix "TR")
REEL DIMENSIONS
Base Qty Bulk Qty A (max) B (min) C ( 0.2) F G (+2 / -0) N (min) T (max)
1000 1000 330 1.5 13 20.2 24.4 100 30.4
TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing All dimensions are in mm.
Start Top cover tape No components Components 500mm min No components
W P0 ( 0.1) P D ( 0.05) D1 (min) F ( 0.1) K (max) P1 ( 0.1)
24 4 12 1.55 1.5 11.5 2.85 2
End
500mm min Empty components pockets sealed with cover tape. User direction of feed
30/33
L4995
Revision history
6
Revision history
Table 13.
Date
Document revision history
Revision Changes
26-May-2006
1
Initial release. L4995A and L4995R versions added: Features section updated and table added. Table 1: Device summary updated. Table 5: Electrical characteristics, Watchdog Iwi entry updated. Figure 2: Block diagram of L4995A and Figure 3: Block diagram of L4995R added. Table 2: Pins descriptions updated. Table 4: Thermal data updated. List of tables and List of figures added. Packaging information provided in new format. Table 11: PowerSSO-12TM mechanical data X and Y values updated. Some sections reformatted for clarity. New disclaimer added. Updated Table 2: Pins descriptions. Updated Figure 4: Pins configurations (L4995). Table 1 changed title. Updated Table 2: Pins descriptions.
05-Jan-2007
2
18-May-2007 09-Jul-2007
3 4
31/33
Revision history Table 13.
Date
L4995 Document revision history (continued)
Revision Changes
09-Aug-2007
5
Updated Table 2: Pins descriptions. Updated Table 12: PowerSSO-24TM mechanical data. Updated Section 2.2: Thermal data: - corrected note changing single layer with double layer. Updated Table 5: General: - changed Ishort typ. value from 750 to 800 mA - added Ishort max. value - changed Ilim typ. value from 820 to 900 mA - added Ilim max. value - added Ilim note - added Vdp note - changed Iqn_1 typ. value from 110 to 90 A - added Iqn_1 max. value - added Iqn_50 max. value - added Iqn_150 max. value - changed Iqn_250 typ. value from 1.2 to 1 mA - added Iqn_250 max. value - changed Iqn_500 typ. value from 2.4 to 2.1 mA - added Iqn_500 max. value Updated Table 6: Reset: - changed Vrlth parameter definition from "Reset timing low" to "Reset delay circuit low threshold" - changed Vrhth parameter definition from "Reset timing high" to "Reset delay circuit high threshold" - added Trd min. and max. values Updated Table 7: Watchdog: - added Iwi max value Updated Table 8: Enable: - changed Pull down current symbol from REn to IEn - changed IEn typ. value from 2.5 to 10 A - added IEn max. value Added Section 2.4: Electrical characteristics curves. Added Section 2.5: Test circuit and waveforms plot. Added Section 4: Package and PCB thermal data
07-Dec-2007
6
32/33
L4995
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
(c) 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
33/33

▲Up To Search▲

Price & Availability of L4995

	To Download L4995 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .